[From Nand to Tetris] Project 1 (1) Elementary logic gates(Not,And, Or, Xor, Mux, DMux)

 

https://m.blog.naver.com/junb7/222792228046

논리게이트의 종류(AND, OR, NOT, NAND, NOR, XOR, XNOR)

 

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Elementary logic gates

 

1) Not

/**
 * Not gate:
 * if (in) out = 0, else out = 1
 */
CHIP Not {
    IN in;
    OUT out;

    PARTS:
    Nand(a= in, b= in, out= out);
}

 

2) And

/**
 * And gate:
 * if (a and b) out = 1, else out = 0 
 */
 
CHIP And {
    IN a, b;
    OUT out;
    
    PARTS:
    
    Nand(a = a, b = b, out = temp);
    Not(in = temp, out = out);
}

3) Or

/**
 * Or gate:
 * if (a or b) out = 1, else out = 0 
 */
CHIP Or {
    IN a, b;
    OUT out;

    PARTS:
    Not(in= a, out= temp1);
    Not(in= b, out= temp2);
    Nand(a= temp1, b= temp2, out= out);
}

4) Xor

/**
 * Exclusive-or gate:
 * if ((a and Not(b)) or (Not(a) and b)) out = 1, else out = 0
 */
CHIP Xor {
    IN a, b;
    OUT out;

    PARTS:
    Not(in= a, out= notA);
    Not(in= b, out= notB);
    And(a= a, b= notB, out= temp1);
    And(a= b, b= notA, out= temp2);
    Or(a= temp1, b= temp2, out= out);
}

5) Mux

/** 
 * Multiplexor:
 * if (sel = 0) out = a, else out = b
 */
CHIP Mux {
    IN a, b, sel;
    OUT out;

    PARTS:
    Not(in= sel, out= notS);
    And(a= a, b=notS , out= temp1);
    And(a= sel, b= b, out= temp2);
    Or(a= temp1, b= temp2, out= out);
}

6) DMux

/**
 * Demultiplexor:
 * [a, b] = [in, 0] if sel = 0
 *          [0, in] if sel = 1
 */
CHIP DMux {
    IN in, sel;
    OUT a, b;

    PARTS:
    Not(in= sel, out= notS);
    And(a= notS, b= in, out= a);
    And(a= sel, b= in, out= b);
}